Description
Le chiffrement homomorphe est un outil cryptographique permettant la manipulation de données en aveugle. Son utilisation généralisée permettrait de proposer des solutions de calcul déporté impliquant des données confidentielles, par exemple des données génomiques pour la médecine personnalisée. Cependant, le chiffrement homomorphe doit faire face à de grandes complexités mémoires et calculatoires. La taille d’une donnée chiffrée est environ 10^5 fois plus importante que la donnée réelle, et une opération sur chiffré est environ 10^6 fois plus lourde que l’opération claire équivalente. Dans cet exposé, nous présenterons d’abord succinctement les problématiques d’accélération matérielle pour le chiffrement homomorphe et les différentes approches existantes. Nous exposerons ensuite plus particulièrement une approche couplant le système de représentation non-positionnel RNS et la multiplication de polynômes par transformée de Fourier sur corps-finis (NTT). Nous nous intéresserons notamment à la question du passage à l’échelle au regard de la grande dynamique des paramètres. Les perspectives d’implémentation apportées par cette approche viendront conclure cet exposé.
Practical infos
Next sessions
-
Onysis: A secure European SoC FPGA
Speaker : Adrien GRASSEIN - Nanoxplore
Developed in collaboration with the DGA, the Onysis project introduces a European SoC FPGA designed to embed advanced hardware security features. This presentation will provide an overview of the Onysis architecture, focusing specifically on its native mechanisms to protect critical systems. We will detail the implementation of its integrated security subsystem, covering the secure boot sequence[…]-
SemSecuElec
-
-
Using High Level Profiling Data to Early Assess the Fault Tolerance of Complex Digital Components
Speaker : Luc NOIZETTE - Nuclétudes (filiale Ariane group)
This presentation outlines an innovative methodology for estimating the fault tolerance of complex components based on application profiling obtained using a high-level virtual platform. A derating factor, derived exclusively from profiling metrics (e.g., lifetime in memory and registers), is calibrated using a reliability dataset collected from a set of benchmarks. Applying it to test softwares[…]-
SemSecuElec
-
Fault injection
-
-
An Assessment of the Security of Reconfigurable Cloud Computing
Speaker : Russell Tessier - University of Massachusetts
In this talk, we examine efforts to protect network processing and computation in cloud-based FPGAs from hardware- and software-based attacks. FPGAs have served as integral components in cloud computing for a decade, even though commercial FPGA architectures were not designed for cloud deployment. A range of potential attacks on cloud-based FPGAs and their remediations are examined. We[…]-
SemSecuElec
-
-
Securing processor's microarchitecture against SCA in a post-quantum cryptography setting
Speaker : Vincent MIGLIORE - LAAS-CNRS
Hardware microarchitecture is a well-known source of side-channel leakages, providing a notable security reduction of standard cryptographic algorithms (e.g. AES) if not properly addressed by software or hardware. In this talk, we present new design approaches to harden processor's microarchitecture against power-based side-channel attacks, relying on configurable and cascadable building blocks[…]-
SemSecuElec
-
Side-channel
-
Micro-architectural vulnerabilities
-
-
Compositional Semantics for Detection and Defense of Speculative Leaks
Speaker : Xaver Fabian - CISPA Helmholtz Center for Information Security
Speculative execution improves CPU performance but introduces vulnerabilities, known as Spectre attacks, which exploit microarchitectural side effects to leak sensitive data. Modern processors employ multiple interacting speculation mechanisms, yet existing approaches predominantly analyze them in isolation, which limits both the automated detection of complex leaks and the formal verification of[…]-
SemSecuElec
-
Side-channel
-
Micro-architectural vulnerabilities
-