Description
Embedded programs (including those on smart cards) are often developed in C and then compiled for the embedded processor. Sometimes they are modified by hand to incorporate countermeasures (fault attacks, etc.), but care must be taken to ensure that this does not disrupt normal program execution and that the countermeasure is actually adequate for blocking the attacks.
In the process, it is possible that the compiler used introduces bugs, or removes countermeasures seen as redundant by the optimisations.
CompCert is a formally verified C compiler meant for safety-critical applications. It applies only a moderate amount of optimizations and lacks optimization and security features available in mainstream compilers.
Chamois is an improved version of CompCert:
- many more optimizations
- security features such as return address authentication, stack canaries, landing pads
https://gricad-gitlab.univ-grenoble-alpes.fr/certicompil/Chamois-CompCert
Based on Chamois, we propose Chamois-Arsene, which can introduce control-flow integrity countermeasures and protections against fault attacks, with mathematical proofs and experimental analyses demonstrating the effectiveness of countermeasures.
https://gricad-gitlab.univ-grenoble-alpes.fr/certicompil/Chamois-Arsene
Présentation en Anglais (slides en Anglais)
Talk in English (slides in English)
Practical infos
Next sessions
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HDL simulation for Masked Software Verification
Speaker : Quentin Meunier - Sorbonne Univ. Lip6
Masking is a countermeasure against Side-Channel Attacks (SCA) that aims to ensure that intermediate computations in an algorithm have secret-independent distributions through the use of random variables. This theoretically prevents SCAs, as power consumption is directly linked to the values manipulated by the program or hardware device. Designing a masking scheme is often non-trivial, and a[…]-
SemSecuElec
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Side-channel
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Étude, caractérisation et détection de verrouillage d'anneaux oscillants utilisés dans les générateurs de nombres aléatoires.
Speaker : Eloise Delolme - LabHC
Les générateurs de nombres aléatoires matériels basés sur des oscillateurs en anneau (RO-TRNGs) exploitent le jitter d’horloge comme source d’aléa afin de produire des séquences de bits aléatoires. Parmi ces architectures, le MURO-TRNG repose sur un modèle stochastique complexe qui suppose notamment l’indépendance des oscillateurs. Toutefois, dans la pratique, les oscillateurs en anneau sont[…]-
SemSecuElec
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TRNG
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Securing processor's microarchitecture against SCA in a post-quantum cryptography setting
Speaker : Vincent MIGLIORE - LAAS-CNRS
Hardware microarchitecture is a well-known source of side-channel leakages, providing a notable security reduction of standard cryptographic algorithms (e.g. AES) if not properly addressed by software or hardware. In this talk, we present new design approaches to harden processor's microarchitecture against power-based side-channel attacks, relying on configurable and cascadable building blocks[…]-
SemSecuElec
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Side-channel
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Micro-architectural vulnerabilities
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