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Upcoming
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Conference
BITFLIP 2025 : CyBer, reliability and Tolerance of FauLts in electronic components
Following the success of the first edition of the “BITFLIP by DGA” conference (CyBer, reliability and Tolerance of FauLts in electronic components) in 2023, CREACH LABS in partnership with the DGA Information Superiority is organizing the second edition of BITFLIP during the European Cyber Week 2025. -
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Conference
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Side-channel
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Fuzzing
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Protocols
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Security policies
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Vulnerability management
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Embedded systems
Conférence sur la sécurité couche physique protocolaire
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Thesis defense
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Fault injection
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Hardware architecture
Effects of synchronous clock glitch effect on the security of an integrated circuit
PhD : Amélie MAROTTA, Centre Inria de l'Université de Rennes, IRISA Context: the various sources of security vulnerability Fault injection is part of a bigger ecosystem of vulnerability exploitation methods, which it can be paired with. To make the study of the security challenges of electronic devices easier, we define three sources of vulnerabilities : software, microarchitectural, and physical[…] -
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Thesis defense
Automated Generation of Vulnerable Variable Architectures
PhD : Pierre-Victor BESSON, CentraleSupélec, IRISA The goal of this thesis is to offer a new paradigm for the deployment of vulnerable architectures. This paradigm is able to describe an attack scenario on a high level of abstraction, before converting this description into multiple instances on a lower level, which may be deployed and attacked on a network. -
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Thesis defense
Identification par apprentissage de l’empreinte radio-fréquence de dispositifs sensibles
PhD : Alice Chillet, Université de Rennes, IRISA L’identification de dispositifs dits sensibles est soumise à différentes contraintes de sécurité ou de consommation d’énergie, ce qui rend les méthodes d’identification classiques peu adaptées. Pour répondre à ces contraintes, il est possible d’utiliser les défauts intrinsèques de la chaîne de transmission des dispositifs pour les[…] -
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Conference
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Cryptography
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TRNG
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Hardware architecture
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PUF
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Embedded systems
Random Number Generators and Physical Unclonable Functions by DGA
The aim of this conference is to bring together some of the best European teams whether they come from the academic world, industry or administrations in order to have a meeting of minds on the main stakes for research, to boost collaborative projects, and allow researchers to have a global and shared vision of what is done and of the strategic directions to follow. -