Table of contents

  • This session has been presented December 20, 2024 (10:00 - 11:00).

Description

  • Speaker

    François Sarrazin, Pierre Granier - University of Rennes, IETR (UMR 6164)

Electromagnetic leakage eavesdropping is an increasingly accessible attack vector due to the democratization of software-defined radio. "TEMPEST" attacks rely on passively listening to the unwanted electromagnetic emanations of a target (computer screen, low speed USB peripheral…) in order to retrieve the transmitted data. However, the range and properties of such leakages are unpredictable. Therefore, hardware implants have been designed to covertly extract data in a more controlled and covert manner compared to opportunistic leakage, in return for a more invasive attack. In this talk, we will focus on recent progress regarding the development of hardware Trojans based on backscattering methods to remotely extract data. In particular, the case of multi-Trojans allowing the taping of different sources will be presented.

Practical infos

Next sessions

  • Protection des processeurs modernes face à la vulnérabilité Spectre

    • April 24, 2026 (10:00 - 11:00)

    • IETR - University of Rennes - Campus de BEAULIEU - Bâtiment 11D, salle numéro 18

    Speaker : Herinomena ANDRIANATREHINA - Inria

    Dans la quête permanente d'une puissance de calcul plus rapide, les processeurs modernes utilisent des techniques permettant d'exploiter au maximum leurs ressources. Parmi ces techniques, l'exécution spéculative tente de prédire le résultat des instructions dont l'issue n'est pas encore connue, mais dont dépend la suite du programme. Cela permet au processeur d'éviter d'être inactif. Cependant,[…]
    • SemSecuElec

    • Micro-architectural vulnerabilities

  • Post-Quantum Cryptography Accelerated by a Superscalar RISC-V Processor

    • April 24, 2026 (11:00 - 12:00)

    • IETR - University of Rennes - Campus de BEAULIEU - Bâtiment 11D, salle numéro 18

    Speaker : Côme Allart - Inria

    Two major changes are currently taking place in the embedded processor ecosystem: open source with the RISC-V instruction set, which could replace the ARM one, and post-quantum cryptography (PQC), which could replace classic asymmetric cryptography algorithms to resist quantum computers.In this context, this thesis investigates the improvement of embedded processor performance, generally for[…]
    • SemSecuElec

    • Implementation of cryptographic algorithm

  • Chamois: Formally verified compilation for optimisation and security

    • June 26, 2026 (10:00 - 11:00)

    • IETR - University of Rennes - Campus de BEAULIEU - Bâtiment 11D, salle numéro 18

    Speaker : David MONNIAUX - CNRS - Verimag

    Embedded programs (including those on smart cards) are often developed in C and then compiled for the embedded processor. Sometimes they are modified by hand to incorporate countermeasures (fault attacks, etc.), but care must be taken to ensure that this does not disrupt normal program execution and that the countermeasure is actually adequate for blocking the attacks.In the process, it is[…]
    • SemSecuElec

    • Fault injection

    • Formal methods

  • Securing processor's microarchitecture against SCA in a post-quantum cryptography setting

    • October 16, 2026 (10:00 - 11:00)

    • IETR - University of Rennes - Campus de BEAULIEU - Bâtiment 11D, salle numéro 18

    Speaker : Vincent MIGLIORE - LAAS-CNRS

    Hardware microarchitecture is a well-known source of side-channel leakages, providing a notable security reduction of standard cryptographic algorithms (e.g. AES) if not properly addressed by software or hardware. In this talk, we present new design approaches to harden processor's microarchitecture against power-based side-channel attacks, relying on configurable and cascadable building blocks[…]
    • SemSecuElec

    • Side-channel

    • Micro-architectural vulnerabilities

Show previous sessions