Description
At the third round of the NIST standardization process, three candidates remain with a security based on error correcting codes, all are key exchange mechanisms. We will explore them according to their security assumptions and properties. Among them, we find an historical scheme (Classic McEliece), as well as schemes using sparse and quasi-cyclic matrices (BIKE and HQC). We will examine pros and cons, as well as, for some of them, aspects of their implementation through possible use cases.
Practical infos
Next sessions
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ML-Based Hardware Trojan Detection in AI Accelerators via Power Side-Channel Analysis
Speaker : Yehya NASSER - IMT Atlantique
Our work discusses the security risks associated with outsourcing AI accelerator design due to the threat of hardware Trojans (HTs), a problem traditional testing methods fail to address. We introduce a novel solution based on Power Side-Channel Analysis (PSCA), where we collect and preprocess power traces by segmenting them and extracting features from both time and frequency domains. This[…]-
SemSecuElec
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Side-channel
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Machine learning
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Hardware trojan
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