Description
The success of horizontal side-channel attacks heavily depends on the quality of the traces as well as the correct extraction of interest areas, which are expected to contain relevant leakages. If former is insufficient, this will consequently degrade the identification capability of potential leakage candidates and often render attacks inapplicable. This work assess the relevance of neural networks in the unsupervised context of horizontal attacks to mitigate noise artefacts from the input signal by proposing two methods with alternative training objectives. Their application results in enhanced traces quality and better exploitability using clustering-based horizontal attacks.
Infos pratiques
Prochains exposés
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Sécurité physique du mécanisme d'encapsulation de clé Classic McEliece
Orateur : Brice Colombier - Laboratoire Hubert Curien, Université Jean Monnet, Saint-Étienne
Le mécanisme d'encapsulation de clé Classic McEliece faisait partie des candidats toujours en lice au dernier tour du processus de standardisation de la cryptographie post-quantique initié par le NIST en 2016. Fondé sur les codes correcteurs d'erreurs, en particulier autour du cryptosystème de Niederreiter, sa sécurité n'a pas été fondamentalement remise en cause. Néanmoins, un aspect important du[…]-
SemSecuElec
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Implementation of cryptographic algorithm
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Double Strike: Breaking Approximation-Based Side-Channel Countermeasures for DNNs
Orateur : Lorenzo CASALINO - CentraleSupélec
Deep neural networks (DNNs) undergo lengthy and expensive training procedures whose outcome - the DNN weights - represents a significant intellectual property asset to protect. Side-channel analysis (SCA) has recently appeared as an effective approach to recover this confidential asset of DNN implementations. Ding et al. (HOST’25) introduced MACPRUNING, a novel SCA countermeasure based on pruning,[…]-
SemSecuElec
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Side-channel
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Protection des processeurs modernes face à la vulnérabilité Spectre
Orateur : Herinomena ANDRIANATREHINA - Inria
Dans la quête permanente d'une puissance de calcul plus rapide, les processeurs modernes utilisent des techniques permettant d'exploiter au maximum leurs ressources. Parmi ces techniques, l'exécution spéculative tente de prédire le résultat des instructions dont l'issue n'est pas encore connue, mais dont dépend la suite du programme. Cela permet au processeur d'éviter d'être inactif. Cependant,[…]-
SemSecuElec
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Micro-architectural vulnerabilities
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Post-Quantum Cryptography Accelerated by a Superscalar RISC-V Processor
Orateur : Côme Allart - Inria
Two major changes are currently taking place in the embedded processor ecosystem: open source with the RISC-V instruction set, which could replace the ARM one, and post-quantum cryptography (PQC), which could replace classic asymmetric cryptography algorithms to resist quantum computers.In this context, this thesis investigates the improvement of embedded processor performance, generally for[…]-
SemSecuElec
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Implementation of cryptographic algorithm
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Chamois: Formally verified compilation for optimisation and security
Orateur : David MONNIAUX - CNRS - Verimag
Embedded programs (including those on smart cards) are often developed in C and then compiled for the embedded processor. Sometimes they are modified by hand to incorporate countermeasures (fault attacks, etc.), but care must be taken to ensure that this does not disrupt normal program execution and that the countermeasure is actually adequate for blocking the attacks.In the process, it is[…]-
SemSecuElec
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Fault injection
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Formal methods
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