Description
In this seminar I will first discuss unique computer aided design (CAD) compatible SCA security mechanisms. I will present an approach which can significantly increase the physical security-level of a design, be implemented with conventional design-tools and which does not require any special technological-support. The method consists with a correct by-design utilization of power-management libraries and tools; it embeds special and ultra low-cost randomization mechanisms in a local fashion into the RTL of a design. Therefore, making it mature and easy to master by any backend/frontend digital designer. This method is ideally suited for high security levels when used as a building block to reduce the SNR and amplify the noise in the leakage with mathematical solutions (e.g. masking). Theoretically, a limitation of the construction as a stand-alone is security-energy scaling, i.e. for very high security levels its energy cost is exponential. I will present a glimpse of our current work answering this challenge with an alternative construction which provide linear cost.
In the second part of the talk, I will discuss the threat of externally amplified coupling (EAC) attacks. A type of attack which is very dangerous for masked designs as it merges shares leakage which are otherwise supposed to be independent (weather hardware or software). I will review some of our work on the topic and will discuss the scalability of EAC attacks to high order masking designs, its dominance as compared to inherent (intra device) coupling and I will show some results from current experimentation with a dedicated ASIC test bad. Interestingly, the first and second part of the talk share a link which will be discussed.
Prochains exposés
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Fine-grained dynamic partitioning against cache-based side channel attacks
Orateur : Nicolas Gaudin - Trasna
The growth of embedded systems takes advantage of architectural advances from modern processors to increase performance while maintaining a low power consumption. Among these advances is the introduction of cache memory into embedded systems. These memories speed up the memory accesses by temporarily storing data close to the execution core. Furthermore, data from different applications share the[…]-
SemSecuElec
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Micro-architectural vulnerabilities
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Hardware architecture
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Side-Channel Based Disassembly on Complex Processors: From Microachitectural Characterization to Probabilistic Models
Orateur : Julien Maillard - CEA
Side-Channel Based Disassembly (SCBD) is a category of Side-Channel Analysis (SCA) that aims at recovering information on the code executed by a processor through the observation of physical side-channels such as power consumption or electromagnetic radiations. While traditional SCA often targets cryptographic keys, SCBD focuses on retrieving assembly code that can hardly be extracted via other[…]-
SemSecuElec
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Side-channel
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Hardware reverse
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PhaseSCA: Exploiting Phase-Modulated Emanations in Side Channels
Orateur : Pierre Ayoub - LAAS-CNRS
In recent years, the limits of electromagnetic side-channel attacks have been significantly expanded.However, while there is a growing literature on increasing attack distance or performance, the discovery of new phenomenons about compromising electromagnetic emanations remains limited. In this work, we identify a novel form of modulation produced by unintentional electromagnetic emanations: phase[…]-
Side-channel
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Conformité TEMPEST et compromission d’information au travers de l’arbre d’alimentation d’un équipement
Orateur : Tristan PECHERAU, David HARDY - Thalès
THALES conçoit des équipements cryptographiques et de radiocommunication tactiques, navales et aéronautiques, embarquant des éléments de chiffrement pour la sécurité des communications. Cette sécurité notamment d’un point de vue des émanations électromagnétiques est normée. Ces normes de sécurité de l’information, sont connues sous le nom de code “TEMPEST”, correspondant aux normes OTAN SDIP-27,[…]