627 résultats

  • Euclidean lattice and PMNS: arithmetic, redundancy and equality test

    • 31 janvier 2025 (13:45 - 14:45)

    • IRMAR - Université de Rennes - Campus Beaulieu Bat. 22, RDC, Rennes - Amphi Lebesgue

    Orateur : Fangan Yssouf Dosso - Laboratoire SAS, École des Mines de Saint-Étienne

    The Polynomial Modular Number System (PMNS) is an integer number system that aims to speed up arithmetic operations modulo a prime number p. This system is defined by a tuple (p, n, g, r, E), where p, n, g and r are positive integers, and E is a polynomial with integer coefficients, having g as a root modulo p. Arithmetic operations in PMNS rely heavily on Euclidean lattices. Modular reduction in[…]

  • Cherifying Linux: A Practical View on using CHERI

    • 31 janvier 2025 (11:00 - 12:00)

    • Centre Inria de l'Université de Rennes - - salle Aurigny

    Orateur : Kui Wang - Huawei

    The CHERI ISA extension enables modern RISC CPU architectures such as RISC-V to enforce memory safety in C/C++ programs. Recent academic works use CHERI for point solutions like constructing enclaves, verifying C programs, or hardening bytecode interpreters, but since the original construction of the CHERI-BSD OS - a FreeBSD port leveraging CHERI capabilities, by Cambridge University - little has[…]

    • SoSysec

    • Compartmentalization

    • Operating system and virtualization

  • Updatable Encryption from Group Actions

    • 24 janvier 2025 (13:45 - 14:45)

    • IRMAR - Université de Rennes - Campus Beaulieu Bat. 22, RDC, Rennes - Amphi Lebesgue

    Orateur : Maxime Romeas - ANSSI

    Updatable Encryption is a variant of symmetric encryption that allows to rotate the encryption key in the outsourced storage setting while minimizing the bandwith used. Indeed, any third party can update ciphertexts to the new key using a token provided by the key holder. UE schemes aim at providing strong confidentiality guarantees against adversaries that can corrupt keys and tokens.  In this[…]

  • I know what your compiler did: Optimization Effects on Power Side-Channel Leakage for RISC-V

    • 24 janvier 2025 (11:00 - 12:00)

    • Inria Center of the University of Rennes - Espace de conférences

    Orateur : Ileana Buhan - Radboud University Nijmegen

    With the growing prevalence of software-based cryptographic implementations in high-level languages, understanding the role of architectural and micro-architectural components in side-channel security is critical. The role of compilers in case of software implementations towards contribution to side-channel leaks is not investigated. While timing-based side-channel leakage due to compiler effects[…]

    • SemSecuElec

    • Side-channel

  • Hardware Trojan Horses and Microarchitectural Side-Channel Attacks: Detection and Mitigation via Hardware-based Methodologies

    • 24 janvier 2025 (10:00 - 11:00)

    • Inria Center of the University of Rennes - Espace de conférences

    Orateur : Alessandro PALUMBO - CentraleSupélec, IRISA, Inria

    Hardware Trojan Horses that are software-exploitable can be inserted into microprocessors, allowing attackers to run unauthorized code or escalate privileges. Additionally, it has been demonstrated that attackers could observe certain microprocessor features - seemingly unrelated to the program's execution - to exfiltrate secrets or private data. So, even devices produced in secure foundries could[…]

    • SemSecuElec

    • Side-channel

    • Micro-architectural vulnerabilities

    • Hardware trojan

  • Séminaire C2

    • 17 janvier 2025 (11:30 - 17:00)

    • Nancy

    11h30  Katharina Boudgoust (CR CNRS, LIRMM) : The Power of NAPs: Compressing OR-Proofs via Collision-Resistant HashingProofs of partial knowledge allow for proving the validity of t out of n different statements without revealing which ones those are. In this presentation, we describe a new approach for transforming certain proofs system into new ones that allows for proving partial knowledge. The[…]
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