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717 results

    • Seminar

    • SemSecuElec

    Sécurité physique du mécanisme d'encapsulation de clé Classic McEliece

    • March 20, 2026 (10:00 - 11:00)

    • Inria Center of the University of Rennes - Espace de conférences

    Speaker : Brice Colombier - Laboratoire Hubert Curien, Université Jean Monnet, Saint-Étienne

    Le mécanisme d'encapsulation de clé Classic McEliece faisait partie des candidats toujours en lice au dernier tour du processus de standardisation de la cryptographie post-quantique initié par le NIST en 2016. Fondé sur les codes correcteurs d'erreurs, en particulier autour du cryptosystème de Niederreiter, sa sécurité n'a pas été fondamentalement remise en cause. Néanmoins, un aspect important du[…]
    • SemSecuElec

    • Implementation of cryptographic algorithm

    • Seminar

    • Cryptography

    Séminaire C2 à INRIA Paris

    • January 16, 2026 (10:00 - 17:00)

    • INRIA Paris

    Emmanuel Thomé et Pierrick Gaudry; Rachelle Heim Boissier; Épiphane Nouetowa; Dung Bui.  Plus d'infos sur https://seminaire-c2.inria.fr/ 
    • Seminar

    • SemSecuElec

    Chamois: Formally verified compilation for optimisation and security

    • June 26, 2026 (10:00 - 11:00)

    • Inria Center of the University of Rennes - Espace de conférences

    Speaker : David MONNIAUX - CNRS - Verimag

    Embedded programs (including those on smart cards) are often developed in C and then compiled for the embedded processor. Sometimes they are modified by hand to incorporate countermeasures (fault attacks, etc.), but care must be taken to ensure that this does not disrupt normal program execution and that the countermeasure is actually adequate for blocking the attacks.In the process, it is[…]
    • SemSecuElec

    • Fault injection

    • Formal methods

    • Seminar

    • SemSecuElec

    ML-Based Hardware Trojan Detection in AI Accelerators via Power Side-Channel Analysis

    • January 16, 2026 (11:00 - 12:00)

    • Inria Center of the University of Rennes - Espace de conférences

    Speaker : Yehya NASSER - IMT Atlantique

    Our work discusses the security risks associated with outsourcing AI accelerator design due to the threat of hardware Trojans (HTs), a problem traditional testing methods fail to address. We introduce a novel solution based on Power Side-Channel Analysis (PSCA), where we collect and preprocess power traces by segmenting them and extracting features from both time and frequency domains. This[…]
    • SemSecuElec

    • Side-channel

    • Machine learning

    • Hardware trojan

    • Seminar

    • SoSysec

    Should I trust or should I go? A deep dive into the (not so reliable) web PKI trust model

    • December 19, 2025 (11:00 - 12:00)

    • Inria Center of the University of Rennes - Room Markov

    Speaker : Romain Laborde - University of Toulouse

    The padlock shown in the URL bar of our favorite web browser indicates that we are connected using a secure HTTPS connection and providing some sense of security. Unfortunately, the reality is slightly more complex. The trust model of the underlying Web PKI is invalid, making TLS a colossus with feet of clay. In this talk, we will dive into the trust model of the web PKI ecosystem to understand[…]
    • SoSysec

    • Protocols

    • Network

    • Seminar

    • SoSysec

    Hardware-Software Co-Designs for Microarchitectural Security

    • December 11, 2025 (11:00 - 12:00)

    • Inria Center of the University of Rennes - Room Petri/Turing

    Speaker : Lesly-Ann Daniel - EURECOM

    Microarchitectural optimizations, such as caches and speculative out-of-order execution, are essential for achieving high performance. However, these same mechanisms also open the door to attacks that can undermine software-enforced security policies. The current gold standard for defending against such attacks is the constant-time programming discipline, which prohibits secret-dependent control[…]
    • SoSysec

    • Hardware/software co-design

    • Micro-architectural vulnerabilities