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708 results

    • Seminar

    • SemSecuElec

    HardBlare, a hardware/software co-design approach for Information Flow Control

    • June 22, 2018

    • Centrale-Supelec - Salles Petri/Turing

    Speaker : Guillaume Hiet – Pascal Cotret

    One way to increase the security level of computer systems is to rely on both software and hardware mechanisms. In this context, the HardBlare project proposes a software hardware co-design methodology to ensure that security properties are preserved all along the execution of the system but also during file storage. The HardBlare project is a multidisciplinary project between CentraleSupélec IETR[…]
    • Seminar

    • SemSecuElec

    SideLine and the advent of software-induced hardware attacks

    • March 19, 2021

    • Mines Saint-Etienne – Thales - Web-Conférence

    Speaker : Joseph Gravellier

    In this talk, we will discuss software-induced hardware attacks and their impact for IoT, cloud and mobile security. More specifically, I will introduce SideLine, a new power side-channel attack vector that can be triggered remotely to infer cryptographic secrets. SideLine is based on the intentional misuse of delay-lines components embedded in SoCs that use external memory. I will explain how we[…]
    • Seminar

    • SemSecuElec

    True Random Number Generators enabled hardware security

    • March 29, 2019

    • Hardware Security and Cryptographic Processor Lab, Institute of Microelectronics, Tsinghua University, China - Métivier

    Speaker : Bohan Yang

    True randomness is all about unpredictability, which can neither be qualified nor quantified by examining statistics of a sequence of digits. Unpredictability is a property of random phenomena, which is measured in bits of information entropy. Application of randomness spans from art to numerical computing and system security. Random numbers enable various cryptographic algorithms, protocols and[…]
    • Seminar

    • SemSecuElec

    Post-Quantum Cryptography Hardware: Monolithic Implementations vs. Hardware-Software Co-Design

    • April 23, 2021

    • PQShield – United Kingdom - Web-Conférence

    Speaker : Markku-Juhani Saarinen

    At PQShield, we’ve developed dedicated coprocessor(s) for lattice schemes, hash-based signatures, and code-based cryptography. These cryptographic modules are commercial rather than academic and designed to meet customer specifications such as a specific performance profile or Common Criteria and FIPS security certification requirements.Hardware implementations of legacy RSA and Elliptic Curve[…]
    • Seminar

    • Cryptography

    New uses in Symmetric Cryptography: from Cryptanalysis to Designing

    • May 20, 2022

    • IRMAR - Université de Rennes - Campus Beaulieu Bat. 22, RDC, Rennes - Amphi Lebesgue

    Speaker : Clémence Bouvier - INRIA

    New symmetric primitives are being designed to be run in abstract settings such as Multi-Party Computations (MPC) or Zero-Knowledge (ZK) proof systems. More particularly, these protocols have highlighted the need to minimize the number of multiplications performed by the primitive in large finite fields.<br/> As the number of such primitives grows, it is important to better understand the[…]
    • Seminar

    • Cryptography

    PMNS for efficient arithmetic and small memory cost

    • June 10, 2022

    • IRMAR - Université de Rennes - Campus Beaulieu Bat. 22, RDC, Rennes - Amphi Lebesgue

    Speaker : Fangan Yssouf Dosso - Ecole des Mines de Saint-Etienne

    The Polynomial Modular Number System (PMNS) is an integer number system which aims to speed up arithmetic operations modulo a prime p. Such a system is defined by a tuple (p, n, g, r, E), where p, n, g and r are positive integers, E is a monic polynomial with integer coefficients, having g as a root modulo p. Most of the work done on PMNS focus on polynomials E such that E(X) = X^n – l, where l is[…]