FeFET based Logic-in-Memory design, methodologies, tools and open challenges

Data-centric applications such as artificial intelligence and the Internet of Things (IoT) impose increasingly stringent demands on the performance, the security and the energy efficiency of modern computing architectures. Traditional approaches are often unable to keep pace with these requirements making necessary to explore innovative paradigms such as in-memory computing. This paradigm is particularly promising as it minimizes the data movement between memory and processing units, one of the most important bottleneck in conventional systems. Ferroelectric transistors (FeFETs) are at the forefront of this innovation, pushing the boundaries by enabling the development of intrinsically non-volatile logic gates. These gates enables tight integration of memory and logic. This concept is known as Logic in Memory (LiM) and offers a significant reduction of energy consumption while improving computational speed at the same time.

However, the transition from concept to application is far from easy and a lot of challenges have yet to be overcome. Designing non-volatile logic gates is just the first step; these components must also be integrated into complete, functioning architectures capable of handling complex operations, such as cryptographic algorithms. The methodology we propose addresses these challenges by outlining a process for designing such operations using FeFETs, embedding them within a full-scale computing framework, and rigorously evaluating their performance and benefits. Furthermore, the development of these LiM structures raises new issues in logic synthesis, requiring the adaptation of existing synthesis tools or the creation of new ones. Addressing these challenges is crucial for the successful implementation of LiM-based systems in real-world applications.