Description
Electromagnetic injection (EMI) is a common and non-invasive technique used to perform fault attacks. In that case, an electromagnetic wave is radiated by an antenna in the close vicinity of the targeted microcontroller (STM32 in our case).
The clock signal is generated thanks to a Phase-Locked-Loop (PLL). The PLL is highly sensitive to EMI and then induces severe disruption on the clock signal just after the injection. It appears that these clock glitches are the cause of faults observed at the software level.
TRAITOR is a light and highly configurable platform which can reproduce, using FPGA, a clock signal with the same disruptions than obtained by EMI. The signal generated replaces the clock source of the STM32.
User can then perform several glitches at different time in order to fault a program at run-time and induce vulnerabilities. It can especially be applied to code with counter-measure to only one injection fault and then bypass this counter-measure. At the end, multiple fault injection could completely transform an innocent piece of code and make it malicious.
Infos pratiques
Prochains exposés
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Chamois: Formally verified compilation for optimisation and security
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Embedded programs (including those on smart cards) are often developed in C and then compiled for the embedded processor. Sometimes they are modified by hand to incorporate countermeasures (fault attacks, etc.), but care must be taken to ensure that this does not disrupt normal program execution and that the countermeasure is actually adequate for blocking the attacks.In the process, it is[…]-
SemSecuElec
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Fault injection
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Formal methods
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Security of Smart Dust: Robust Key Derivation for Single-Chip Systems
Orateur : Sara Faour - Inria
The Smart Dust vision seeks to enable large networks of millimeter-scale wireless sensor nodes that tightly integrate sensing, computation, communication, and power management into a single-chip device. Establishing a robust hardware root of trust for such devices remains challenging, particularly in single, low-cost chip manufacturing processes that lack embedded writable Non-Volatile Memory (NVM[…] -
Securing processor's microarchitecture against SCA in a post-quantum cryptography setting
Orateur : Vincent MIGLIORE - LAAS-CNRS
Hardware microarchitecture is a well-known source of side-channel leakages, providing a notable security reduction of standard cryptographic algorithms (e.g. AES) if not properly addressed by software or hardware. In this talk, we present new design approaches to harden processor's microarchitecture against power-based side-channel attacks, relying on configurable and cascadable building blocks[…]-
SemSecuElec
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Side-channel
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Micro-architectural vulnerabilities
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Onysis: A secure European SoC FPGA
Orateur : Adrien GRASSEIN - Nanoxplore
Developed in collaboration with the DGA, the Onysis project introduces a European SoC FPGA designed to embed advanced hardware security features. This presentation will provide an overview of the Onysis architecture, focusing specifically on its native mechanisms to protect critical systems. We will detail the implementation of its integrated security subsystem, covering the secure boot sequence[…]-
SemSecuElec
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