Description
True randomness is all about unpredictability, which can neither be qualified nor quantified by examining statistics of a sequence of digits. Unpredictability is a property of random phenomena, which is measured in bits of information entropy. Application of randomness spans from art to numerical computing and system security. Random numbers enable various cryptographic algorithms, protocols and secured implementations by providing secret keys, initialization vectors, random challenges and masks. As embedded electronics continue to be integrated into our daily lives, security becomes an indispensable requirement for an embedded system. According to the renowned Kerckhoffs’ principle, a cryptographic system should be secure even if the attacker knows everything about the system, except the key. In modern computers and embedded systems, this key is usually generated by executing a True Random Number Generator. Therefore, it is essential that unpredictable random numbers are available in secure embedded systems. Unfortunately, designing a TRNG is not trivial and different from conventional digital circuit design, since most digital circuits are primarily developed to behave in a deterministic digital manner. Instead of pursuing a stable and predictable behavior of the circuit, the TRNG design aims for a stable and robust unpredictability. Producing unpredictable output is usually undesired for an integrated circuit, and is sometimes regarded as a design failure. Having mistakes or being careless at any step of the TRNG design and fabrication procedure may lead to insufficient entropy or/and a malfunctioned TRNG. A True Random Number Generator (TRNG) circuit is designed to be sensitive to a particular physical phenomenon when it is in use, and to be resistant to process variations and other unwanted random physical phenomena. In order to tackle the lack of compact and efficient TRNGs on FPGAs, we proposed a novel TRNG based on edge sampling.
Infos pratiques
Prochains exposés
-
HDL simulation for Masked Software Verification
Orateur : Quentin Meunier - Sorbonne Univ. Lip6
Masking is a countermeasure against Side-Channel Attacks (SCA) that aims to ensure that intermediate computations in an algorithm have secret-independent distributions through the use of random variables. This theoretically prevents SCAs, as power consumption is directly linked to the values manipulated by the program or hardware device. Designing a masking scheme is often non-trivial, and a[…]-
SemSecuElec
-
Side-channel
-
-
Étude, caractérisation et détection de verrouillage d'anneaux oscillants utilisés dans les générateurs de nombres aléatoires.
Orateur : Eloise Delolme - LabHC
Les générateurs de nombres aléatoires matériels basés sur des oscillateurs en anneau (RO-TRNGs) exploitent le jitter d’horloge comme source d’aléa afin de produire des séquences de bits aléatoires. Parmi ces architectures, le MURO-TRNG repose sur un modèle stochastique complexe qui suppose notamment l’indépendance des oscillateurs. Toutefois, dans la pratique, les oscillateurs en anneau sont[…]-
SemSecuElec
-
TRNG
-
-
Chamois: Formally verified compilation for optimisation and security
Orateur : David MONNIAUX - CNRS - Verimag
Embedded programs (including those on smart cards) are often developed in C and then compiled for the embedded processor. Sometimes they are modified by hand to incorporate countermeasures (fault attacks, etc.), but care must be taken to ensure that this does not disrupt normal program execution and that the countermeasure is actually adequate for blocking the attacks.In the process, it is[…]-
SemSecuElec
-
Fault injection
-
Formal methods
-
-
Securing processor's microarchitecture against SCA in a post-quantum cryptography setting
Orateur : Vincent MIGLIORE - LAAS-CNRS
Hardware microarchitecture is a well-known source of side-channel leakages, providing a notable security reduction of standard cryptographic algorithms (e.g. AES) if not properly addressed by software or hardware. In this talk, we present new design approaches to harden processor's microarchitecture against power-based side-channel attacks, relying on configurable and cascadable building blocks[…]-
SemSecuElec
-
Side-channel
-
Micro-architectural vulnerabilities
-