693 résultats

• CREACH LABS, partenaire de PQCrypto 2026

  CREACH LABS vous invite à participer à la 17e conférence internationale sur la cryptographie post-quantique (PQCrypto) qui se tiendra du 14 au 16 avril 2026 à Saint-Malo en France.

  31 mars 2026

• • Séminaire

  • SoSysec

  Privacy-preserving collaboration for intrusion detection in distributed systems

  • 27 mars 2026 (11:00 - 12:00)

  • Inria Center of the University of Rennes - Room Markov

  Orateur : Léo Lavaur - Université du Luxembourg

  The emergence of Federated Learning (FL) has rekindled the interest in collaborative intrusion detection systems, which were previously limited by the risks of information disclosure associated with data sharing. But is it a good collaboration tool? Originally designed to train prediction models on distributed consumer data without compromising data confidentiality, its use as a collaborative[…]

  • SoSysec

  • Privacy

  • Intrusion detection

  • Distributed systems

• • Séminaire

  • SemSecuElec

  Post-Quantum Cryptography Accelerated by a Superscalar RISC-V Processor

  • 24 avril 2026 (11:00 - 12:00)

  • IETR - University of Rennes - Campus de BEAULIEU - Bâtiment 11D, salle numéro 18

  Orateur : Côme Allart - Inria

  Two major changes are currently taking place in the embedded processor ecosystem: open source with the RISC-V instruction set, which could replace the ARM one, and post-quantum cryptography (PQC), which could replace classic asymmetric cryptography algorithms to resist quantum computers.In this context, this thesis investigates the improvement of embedded processor performance, generally for[…]

  • SemSecuElec

  • Implementation of cryptographic algorithm

• • Séminaire

  • SemSecuElec

  Protection des processeurs modernes face à la vulnérabilité Spectre

  • 24 avril 2026 (10:00 - 11:00)

  • IETR - University of Rennes - Campus de BEAULIEU - Bâtiment 11D, salle numéro 18

  Orateur : Herinomena ANDRIANATREHINA - Inria

  Dans la quête permanente d'une puissance de calcul plus rapide, les processeurs modernes utilisent des techniques permettant d'exploiter au maximum leurs ressources. Parmi ces techniques, l'exécution spéculative tente de prédire le résultat des instructions dont l'issue n'est pas encore connue, mais dont dépend la suite du programme. Cela permet au processeur d'éviter d'être inactif. Cependant,[…]

  • SemSecuElec

  • Micro-architectural vulnerabilities

• • Séminaire

  • SemSecuElec

  Securing processor's microarchitecture against SCA in a post-quantum cryptography setting

  • 16 octobre 2026 (10:00 - 11:00)

  • IETR - University of Rennes - Campus de BEAULIEU - Bâtiment 11D, salle numéro 18

  Orateur : Vincent MIGLIORE - LAAS-CNRS

  Hardware microarchitecture is a well-known source of side-channel leakages, providing a notable security reduction of standard cryptographic algorithms (e.g. AES) if not properly addressed by software or hardware. In this talk, we present new design approaches to harden processor's microarchitecture against power-based side-channel attacks, relying on configurable and cascadable building blocks[…]

  • SemSecuElec

  • Side-channel

  • Micro-architectural vulnerabilities

• • Séminaire

  • SemSecuElec

  Double Strike: Breaking Approximation-Based Side-Channel Countermeasures for DNNs

  • 20 mars 2026 (11:00 - 12:00)

  • IETR - University of Rennes - Campus de BEAULIEU - Bâtiment 11D, salle numéro 18

  Orateur : Lorenzo CASALINO - CentraleSupélec

  Deep neural networks (DNNs) undergo lengthy and expensive training procedures whose outcome - the DNN weights - represents a significant intellectual property asset to protect. Side-channel analysis (SCA) has recently appeared as an effective approach to recover this confidential asset of DNN implementations. Ding et al. (HOST’25) introduced MACPRUNING, a novel SCA countermeasure based on pruning,[…]

  • SemSecuElec

  • Side-channel