58 résultats
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Conformité TEMPEST et compromission d’information au travers de l’arbre d’alimentation d’un équipement
Orateur : Tristan PECHERAU, David HARDY - Thalès
THALES conçoit des équipements cryptographiques et de radiocommunication tactiques, navales et aéronautiques, embarquant des éléments de chiffrement pour la sécurité des communications. Cette sécurité notamment d’un point de vue des émanations électromagnétiques est normée. Ces normes de sécurité de l’information, sont connues sous le nom de code “TEMPEST”, correspondant aux normes OTAN SDIP-27,[…] -
Passage à l’échelle des campagnes de simulations d’injections de fautes
Orateur : Ambre Iooss - Synacktiv
Les injections de fautes constituent un vecteur d’attaque intéressant pour passer outre certaines protections lors de l’étude d’un système embarqué. Par exemple, corrompre le flot d’exécution d’un chargeur de démarrage peut permettre de passer outre une vérification de signature, et peut rendre possible l’exécution de code non signé. Dans le cas d’une exécution comportant un grand nombre d[…]-
SemSecuElec
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Fault injection
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PhaseSCA: Exploiting Phase-Modulated Emanations in Side Channels
Orateur : Pierre Ayoub - LAAS-CNRS
In recent years, the limits of electromagnetic side-channel attacks have been significantly expanded.However, while there is a growing literature on increasing attack distance or performance, the discovery of new phenomenons about compromising electromagnetic emanations remains limited. In this work, we identify a novel form of modulation produced by unintentional electromagnetic emanations: phase[…]-
Side-channel
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CHERI standardization and software ecosystem
Orateur : Carl SHAW - CODASIP
This talk will describe the current status of the RISC-V International standardization process to add CHERI as an official extension to RISC-V. It will then explore the current state of CHERI-enabled operating systems, toolchains and software tool development, focusing on the CHERI-RISC-V hardware implementations of CHERI. It will then go on to give likely future development roadmaps and how the[…]-
SoSysec
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SemSecuElec
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Compartmentalization
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Micro-architectural vulnerabilities
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CHERI: Architectural Support for Memory Protection and Software Compartmentalization
Orateur : Robert Watson - University of Cambridge
CHERI is a processor architecture protection model enabling fine-grained C/C++ memory protection and scalable software compartmentalization. CHERI hybridizes conventional processor, instruction-set, and software designs with an architectural capability model. Originating in DARPA’s CRASH research program in 2010, the work has progressed from FPGA prototypes to the recently released Arm Morello[…]-
SoSysec
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SemSecuElec
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Compartmentalization
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Micro-architectural vulnerabilities
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Hardware architecture
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Side-Channel Based Disassembly on Complex Processors: From Microachitectural Characterization to Probabilistic Models
Orateur : Julien Maillard - CEA
Side-Channel Based Disassembly (SCBD) is a category of Side-Channel Analysis (SCA) that aims at recovering information on the code executed by a processor through the observation of physical side-channels such as power consumption or electromagnetic radiations. While traditional SCA often targets cryptographic keys, SCBD focuses on retrieving assembly code that can hardly be extracted via other[…]-
SemSecuElec
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Side-channel
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Hardware reverse
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